Part Number Hot Search : 
1N6527 EE08020 PA154 M06AB 67402BJ IRP460 34671 AS1751V
Product Description
Full Text Search
 

To Download ADM1485JCHIPS Datasheet File

  If you can't view the Datasheet, Please click here to try to view without PDF Reader .  
 
 


  Datasheet File OCR Text:
  rev. a adm1485 5 v low power eia rs-485 transceiver one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781/329-4700 www.analog.com fax: ? analog devices, inc. all rights reserved. information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. functional block diagram 8-lead adm1485 r d ro re di v cc b a gnd de features meets eia rs-485 standard 30 mbps data rate single 5 v supply C7 v to +12 v bus common-mode range high speed, low power bicmos thermal shutdown protection short-circuit protection driver propagation delay: 10 ns receiver propagation delay: 15 ns high-z outputs with power off superior upgrade for ltc1485 applications low power rs-485 systems dte-dce interface packet switching local area networks data concentration data multiplexers integrated services digital network (isdn) general description the adm1485 is a differential line transceiver suitable for high speed bidirectional data communication on multipoint bus trans- mission lines. it is designed for balanced data transmission and complies with both rs-485 and rs-422 eia standards. the part contains a differential line driver and a differential line receiver. both the driver and the receiver may be enabled independently. when disabled, the outputs are three-stated. the adm1485 operates from a single 5 v power supply. excessive power dissipation caused by bus contention or by output shorting is prevented by a thermal shutdown circuit. this feature forces the driver output into a high impedance state if, during fault condi- tions, a significant temperature increase is detected in the internal driver circuitry. up to 32 transceivers may be connected simultaneously on a bus, but only one driver should be enabled at any time. it is important, therefore, that the remaining disabled drivers do not load the bus. to ensure this, the adm1485 driver features high output impedance when disabled and also when powered down. this minimizes the loading effect when the transceiver is not being used. the high impedance driver output is maintained over the entire common-mode voltage range from C7 v to +12 v. the receiver contains a fail-safe feature that results in a logic high output state if the inputs are unconnected (floating). the adm1485 is fabricated on bicmos, an advanced mixed technology process combining low power cmos with fast switching bipolar technology. all inputs and outputs contain protection against esd; all driver outputs feature high source and sink current capability. an epitaxial layer is used to guard against latch-up. the part is fully specified over the commercial and industrial temperature range and is available in pdip, soic, and small msop packages. 2012 781/461-3113 ' the adm1485 features extremely fast switching speeds. minimal driver propagation delays permit transmission at typical data rates of 30 mbps while low skew minimizes emi interference. 
rev. C2C adm1485Cspecifications (v cc = 5 v  5%. all specifications t min to t max , unless otherwise noted.) parameter min typ max unit test conditions/comments driver differential output voltage, v od 5.0 v r = , test circuit 1 2.0 5.0 v v cc = 5 v, r = 50 (rs-422), test circuit 1 1.5 5.0 v r = 27 (rs-485), test circuit 1 v od3 1.5 5.0 v v tst = C7 v to +12 v, test circuit 2 |v od | for complementary output states 0.2 v r = 27 or 50 , test circuit 1 common-mode output voltage v oc 3 v r = 27 or 50 , test circuit 1 |v od | for complementary output states 0.2 v r = 27 or 50 output short-circuit current (v out = high) 35 250 ma C7 v v o +12 v output short-circuit current (v out = low) 35 250 ma C7 v v o +12 v cmos input logic threshold low, v inl 0.8 v cmos input logic threshold high, v inh 2.0 v logic input current (de, di) 1.0 a receiver differential input threshold voltage, v th C0.2 +0.2 v C7 v v cm +12 v input voltage hysteresis, v th 70 mv v cm = 0 v input resistance 12 k C7 v v cm +12 v input current (a, b) 1 ma v in = +12 v C0.8 ma v in = C7 v cmos input logic threshold low, v inl 0.8 v cmos input logic threshold high, v inh 2.0 v logic enable input current ( re ) 1 a cmos output voltage low, v ol 0.4 v i out = +4.0 ma cmos output voltage high, v oh 4.0 v i out = C4.0 ma short-circuit output current 7 85 ma v out = gnd or v cc three-state output leakage current 1.0 a 0.4 v v out 2.4 v power supply current i cc (outputs enabled) 1.0 2.2 ma digital inputs = gnd or v cc i cc (outputs disabled) 0.6 1 ma digital inputs = gnd or v cc specifications subject to change without notice. timing specifications parameter min typ max unit test conditions/comments driver propagation delay input to output t plh , t phl 21015 nsr ldiff = 54 , c l1 = c l2 = 100 pf, test circuit 3 driver o/p to o/p t skew 15 nsr ldiff = 54 , c l1 = c l2 = 100 pf, test circuit 3 driver rise/fall time t r , t f 815 nsr ldiff = 54 , c l1 = c l2 = 100 pf, test circuit 3 driver enable to output valid 10 25 ns r l = 110 , c l = 50 pf, test circuit 4 driver disable timing 10 25 ns r l = 110 , c l = 50 pf, test circuit 4 matched enable switching 0 2 ns r l = 110 , c l = 50 pf, test circuit 4 * |t azh Ct bzl |, |t bzh Ct azl | matched disable switching 0 2 ns r l = 110 , c l = 50 pf, test circuit 4 * |t ahz Ct blz |, |t bhz Ct alz | receiver propagation delay input to output t plh , t phl 81530 nsc l = 15 pf, test circuit 5 skew |t plh Ct phl |5 n s c l = 15 pf, test circuit 5 receiver enable t en1 520 nsc l = 15 pf, r l = 1 k , test circuit 6 receiver disable t en2 520 nsc l = 15 pf, r l = 1 k , test circuit 6 tx pulse width distortion 1 ns rx pulse width distortion 1 ns * guaranteed by characterization. specifications subject to change without notice. (v cc = 5 v  5%. all specifications t min to t max , unless otherwise noted.) '
rev. adm1485 C3C absolute maximum ratings * (t a = 25 c, unless otherwise noted.) v cc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C0.3 v to +7 v inputs driver input (di) . . . . . . . . . . . . . . . .C0.3 v to v cc + 0.3 v control inputs (de, re ) . . . . . . . . . .C0.3 v to v cc + 0.3 v receiver inputs (a, b) . . . . . . . . . . . . . . . . . . C9 v to +14 v outputs driver outputs (a, b) . . . . . . . . . . . . . . . . . . C9 v to +14 v receiver output . . . . . . . . . . . . . . . . .C0.5 v to v cc + 0.5 v power dissipation 8-lead msop . . . . . . . . . . . . . . . 900 mw ja , thermal impedance . . . . . . . . . . . . . . . . . . . 206 c/w power dissipation 8-lead pdip . . . . . . . . . . . . . . . . 500 mw ja , thermal impedance . . . . . . . . . . . . . . . . . . . 130 c/w power dissipation 8-lead soic . . . . . . . . . . . . . . . . 450 mw ja , thermal impedance . . . . . . . . . . . . . . . . . . . 170 c/w operating temperature range commercial (j version) . . . . . . . . . . . . . . . . . . 0 c to 70 c industrial (a version) . . . . . . . . . . . . . . . . C40 c to +85 c storage temperature range . . . . . . . . . . . C65 c to +150 c lead temperature (soldering, 10 sec) . . . . . . . . . . . . . 300 c vapor phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . . 215 c infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 220 c * stresses above those listed under absolute maximum ratings may cause perma- nent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. exposure to absolute maximum ratings for extended periods of time may affect device reliability. pin function descriptions pin mnemonic function no. 1 ro receiver output. when enabled if a > b by 200 mv, then ro = high. if a < b by 200 mv, then ro = low. 2 re receiver output enable. a low level enables the receiver output, ro. a high level places it in a high impedance state. 3 de driver output enable. a high level enables the driver differential outputs, a and b. a low level places it in a high impedance state. 4 di driver input. when the driver is enabled, a logic low on di forces a low and b high while a logic high on di forces a high and b low. 5 gnd ground connection, 0 v. 6 a noninverting receiver input a/driver output a. 7 b inverting receiver in put b/driver output b 8v cc power supply, 5 v 5%. pin configuration top view (not to scale) 8 7 6 5 1 2 3 4 ro re de v cc b a gnd di adm1485 caution esd (electrostatic discharge) sensitive device. electrostatic charges as high as 4000 v readily accumulate on the human body and test equipment and can discharge without detection. although the adm1485 features proprietary esd protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. therefore, proper esd precautions are recommended to avoid performance degradation or loss of functionality. table i. transmitting inputs outputs de di b a 11 0 1 10 1 0 0x z z table ii. receiving inputs outputs re a-b ro 0 +0.2 v 1 0 C0.2 v 0 0 inputs open 1 1x z '
rev. C4C adm1485 test circuits v od r r v oc test circuit 1. driver voltage measurement v od3 60 375 375 v tst test circuit 2. driver voltage measurement r ldiff a b c l1 c l2 test circuit 3. driver propagation delay de 0v or 3v de in a b s1 c l v out r l s2 v cc test circuit 4. driver enable/disable re a b c l v out test circuit 5. receiver propagation delay re +1.5v re in s1 c l v out r l s2 v cc C1.5v test circuit 6. receiver enable/disable switching characteristics 3v 0v b a 0v Cv o v o 90% point 10% point t r t skew =  t plh C t phl  1/2vo t plh 1.5v 1.5v t phl 90% point 10% point t f v o figure 1. driver propagation delay, rise/fall timing de a, b a, b 1.5v 2.3v 2.3v t zh t zl 1.5v 3v 0v v ol v oh 0v v ol + 0.5v v oh C 0.5v t hz t lz figure 2. driver enable/disable timing a, b ro 0v t plh 1.5v 0v t phl 1.5v v oh v ol t skew =  t plh C t phl  figure 3. receiver propagation delay re r r 1.5v 1.5v 1.5v t zh t zl 1.5v 3v 0v v ol v oh v ol + 0.5v v oh C 0.5v t hz t lz o/p low o/p high 0v figure 4. receiver enable/disable timing '
rev. typical performance characteristicsCadm1485 C5C output voltage C v output current C ma 50 0 45 30 25 20 15 10 5 0 0.50 1.00 1.75 40 35 0.25 0.75 1.25 1.50 2.00 tpc 1. output current vs. receiver output low voltage output voltage C v output current C ma 0 3.50 C2 C4 C6 C8 C10 C12 C14 C16 C18 4.00 4.75 5.00 4.25 3.75 4.50 tpc 2. output current vs. receiver output high voltage temperature C c output voltage C v 4.55 C50 C25 125 0 255075100 i = 8ma 4.50 4.45 4.40 4.35 4.30 4.25 4.20 4.15 tpc 3. receiver output high voltage vs. temperature temperature C c output voltage C v 0.40 0.35 0.15 C50 0.20 C25 0 25 50 75 100 125 i = 8ma 0.25 0.30 tpc 4. receiver output low voltage vs. temperature output voltage C v 90 0 output current C ma 0 10 20 30 40 50 60 70 80 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 tpc 5. output current vs. driver differential output voltage temperature C c 2.15 C50 differential voltage C v 1.90 1.95 2.00 2.05 2.10 C25 0 25 50 75 100 125 tpc 6. driver differential output voltage vs. temperature, r l = 26.8 '
rev. C6C adm1485 output voltage C v output current C ma 100 0 0 4.0 1.0 2.0 3.0 90 60 50 30 10 80 70 40 20 0.5 1.5 2.5 3.5 4.5 tpc 7. output current vs. driver output low voltage output voltage C v output current C ma 0 0 C10 C20 C30 C40 C50 C60 C70 C80 C90 C100 1.0 2.0 3.0 4.0 5.0 C110 C120 0.5 1.5 2.5 3.5 4.5 tpc 8. output current vs. driver output high voltage temperature C c C50 supply current C ma 1.0 C25 0 25 50 75 100 125 0.9 0.7 0.5 driver enabled driver disabled 1.1 0.8 0.6 tpc 9. supply current vs. temperature | t plh C t phl | temperature C c time C ns C50 0.7 0.6 0.5 0.4 C25 0 25 50 75 100 125 0.3 0.2 0.1 0 tpc 10. rx skew vs. temperature temperature C c time C ns C50 1 C25 0 25 50 75 100 125 0 2 3 4 5 6 | t phla C t phlb | | t plha C t plhb | tpc 11. tx skew vs. temperature temperature C c pwd 1.2 C50 0.8 0.6 0.4 C25 0 25 50 75 100 125 0.2 0 1.0 1.4 150 | t plh C t phl | tpc 12. tx pulse width distortion '
rev. adm1485 C7C 1, 2 a b tpc 13. unloaded driver differential outputs 1, 2 a b tpc 14. loaded driver differential outputs 4 1, 2 3 a b di ro tpc 15. driver/receiver propagation delays low to high 4 1, 2 3 a b di ro tpc 16. driver/receiver propagation delays high to low 1, 2 a b tpc 17. driver output at 30 mbps '
rev. C8C adm1485 as with any transmission line, it is important that reflections are minimized. this can be achieved by terminating the extreme ends of the line using resistors equal to the characteristic impedance of the line. stub lengths of the main line should also be kept as short as possible. a properly terminated transmission line appears purely resistive to the driver. rt rt d r dd r r d r figure 5. typical rs-485 network thermal shutdown the adm1485 contains thermal shutdown circuitry that protects the part from excessive power dissipation during fault conditions. shorting the driver outputs to a low impedance source can result in high driver currents. the thermal sensing circuitry detects the increase in die temperature and disables the driver outputs. the thermal sensing circuitry is designed to disable the driver outputs when a die temperature of 150 c is reached. as the device cools, the drivers are re-enabled at 140 c. propagation delay the adm1485 features very low propagation delay, ensuring maximum baud rate operation. the driver is well balanced, ensuring distortion free transmission. another important specification is a measure of the skew between the complementary outputs. excessive skew impairs the noise immunity of the system and increases the amount of electro- magnetic interference (emi). receiver open-circuit fail-safe the receiver input includes a fail-safe feature that guarantees a logic high on the receiver when the inputs are open circuit or floating. application information differential data transmission differential data transmission is used to reliably transmit data at high rates over long distances and through noisy environments. differential transmission nullifies the effects of ground shifts and noise signals that appear as common-mode voltages on the line. there are two main standards approved by the electronics industries association (eia) that specify the electrical charac- teristics of transceivers used in differential data transmission. the rs-422 standard specifies data rates up to 10 mbaud and line lengths up to 4000 ft. a single driver can drive a transmission line with up to 10 receivers. in order to cater to true multipoint communications, the rs-485 standard was defined. this standard meets or exceeds all the requirements of the rs-422 but also allows for up to 32 drivers and 32 receivers to be connected to a single bus. an extended com- mon- mode range of C7 v to +12 v is defined. the most significant difference between the rs-422 and the rs-485 is the fact that the drivers may be disabled, thereby allowing more than one (32 in fact) to be connected to a single line. only one driver should be enabled at a time, but the rs-485 standard contains additional specifi cations to guarantee device safety in the event of line contention. table iii. comparison of rs-422 and rs-485 interface standards specification rs-422 rs-485 transmission type differential differential maximum cable length 4000 ft. 4000 ft. minimum driver output voltage 2 v 1.5 v driver load impedance 100 54 receiver input resistance 4 k min 12 k min receiver input sensitivity 200 mv 200 mv receiver input voltage range C7 v to +7 v C7 v to +12 v no. of drivers/receivers per line 1/10 32/32 cable and data rate the transmission line of choice for rs-485 communications is a twisted pair. twisted pair cable tends to cancel common-mode noise and also causes cancellation of the magnetic fields generated by the current flowing through each wire, thereby reducing the effective inductance of the pair. the adm1485 is designed for bidirectional data communications on multipoint transmission lines. a typical application showing a multipoint transmission network is illustrated in figure 5. an rs-485 transmission line can have as many as 32 transceivers on the bus. only one driver can transmit at a particular time, but multiple receivers may be enabled simultaneously. '
adm1485 rev. f C 9 C outline dimensions figure 6. 8-lead standard small outline package [soic_n] narrow body (r-8) dimensions shown in millimeters and (inches) figure 7. 8-lead mini small outline package [msop] (rm-8) dimensions shown in millimeters controlling dimensions are in millimeters; inch dimensions (in parentheses) are rounded-off millimeter equivalents for reference only and are not appropriate for use in design. compliant to jedec standards ms-012-aa 012407-a 0.25 (0.0098) 0.17 (0.0067) 1.27 (0.0500) 0.40 (0.0157) 0.50 (0.0196) 0.25 (0.0099) 45 8 0 1.75 (0.0688) 1.35 (0.0532) seating plane 0.25 (0.0098) 0.10 (0.0040) 4 1 85 5.00 (0.1968) 4.80 (0.1890) 4.00 (0.1574) 3.80 (0.1497) 1.27 (0.0500) bsc 6.20 (0.2441) 5.80 (0.2284) 0.51 (0.0201) 0.31 (0.0122) coplanarity 0.10 compliant to jedec standards mo-187-aa 6 0 0.80 0.55 0.40 4 8 1 5 0.65 bsc 0.40 0.25 1.10 max 3.20 3.00 2.80 coplanarity 0.10 0.23 0.09 3.20 3.00 2.80 5.15 4.90 4.65 pin 1 identifier 15 max 0.95 0.85 0.75 0.15 0.05 10-07-2009-b
adm1485 C10C rev. f figure 8. 8-lead plastic dual in-line package [pdip] narrow body (n-8) dimensions shown in inches and (millimeters) ordering guide model 1 temperature range package description package option brand adm1485jnz 0c to 70c 8-lead pdip n-8 adm1485jrz 0c to 70c 8-lead soic_n r-8 adm1485jr-reel 0c to 70c 8-lead soic_n r-8 adm1485jrz-reel 0c to 70c 8-lead soic_n r-8 adm1485anz ?40c to +85c 8-lead pdip n-8 adm1485armz ?40c to +85c 8-lead msop rm-8 m42 adm1485armz-reel ?40c to +85c 8-lead msop rm-8 m42 adm1485armz-reel7 ?40c to +85c 8-lead msop rm-8 m42 adm1485arz 8-lead soic_n r-8 adm1485arz-reel 8-lead soic_n r-8 adm1485arz-reel7 8-lead soic_n r-8 ADM1485JCHIPS die 1 z = rohs compliant part. compliant to jedec standards ms-001 controlling dimensions are in inches; millimeter dimensions (in parentheses) are ro unded-off inch equivalents for reference only and are not appropriate for use in design. corner leads may be configured as whole or half leads. 070606-a 0.022 (0.56) 0.018 (0.46) 0.014 (0.36) seating plane 0.015 (0.38) min 0.210 (5.33) max 0.150 (3.81) 0.130 (3.30) 0.115 (2.92) 0.070 (1.78) 0.060 (1.52) 0.045 (1.14) 8 1 4 5 0.280 (7.11) 0.250 (6.35) 0.240 (6.10) 0.100 (2.54) bsc 0.400 (10.16) 0.365 (9.27) 0.355 (9.02) 0.060 (1.52) max 0.430 (10.92) max 0.014 (0.36) 0.010 (0.25) 0.008 (0.20) 0.325 (8.26) 0.310 (7.87) 0.300 (7.62) 0.195 (4.95) 0.130 (3.30) 0.115 (2.92) 0.015 (0.38) gauge plane 0.005 (0.13) min
adm1485 rev. f C11 C revision history 8 /12rev. e to rev. f changed data rates of up to 5 mbps to typical data rates of 30 mbps .......................................................................................... 1 updated outline dimensions ......................................................... 9 changes to ordering guide .......................................................... 10 9/03data sheet changed from rev. d to rev. e. change to specifications ......................................................... 2 changes to ordering guide ................................................... 3 updated outline dimensions .............................................. 9 7/03data sheet changed from rev. c to rev. d. changes to specifications ...................................................... 2 changes to absolute maximum ratings ......................... 3 updated ordering guide ......................................................... 3 1/03data sheet changed from rev. b to rev. c. change to specifications ......................................................... 2 change to ordering guide ...................................................... 3 12/02data sheet changed from rev. a to rev. b. deleted q-8 package .......................................................... universal edits to features .......................................................................... 1 edits to general description .............................................. 1 edits, additions to specifications ........................................... 2 edits, additions to absolute maximum ratings............. 3 additions to ordering guide .................................................. 3 tpcs updated and reformatted ....................................................... 5 addition of 8-lead msop package ................................................ 9 update to outline dimensions ............................................. 9 ?2012 analog devices, inc. all rights reserved. trademarks and registered trademarks are the prop erty of their respective owners. d00063-0- 8 /12(f)


▲Up To Search▲   

 
Price & Availability of ADM1485JCHIPS

All Rights Reserved © IC-ON-LINE 2003 - 2022  

[Add Bookmark] [Contact Us] [Link exchange] [Privacy policy]
Mirror Sites :  [www.datasheet.hk]   [www.maxim4u.com]  [www.ic-on-line.cn] [www.ic-on-line.com] [www.ic-on-line.net] [www.alldatasheet.com.cn] [www.gdcy.com]  [www.gdcy.net]


 . . . . .
  We use cookies to deliver the best possible web experience and assist with our advertising efforts. By continuing to use this site, you consent to the use of cookies. For more information on cookies, please take a look at our Privacy Policy. X